University of Southern California
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University of Southern California

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John Damoulakis, PhD
Title Division Director
DegreesPhD, Mechanical-Aerospace Engineering, Rice University
MS, Electrical and Mechanical Engineering, Technical University of Athens, Greece
Phone703.812.3718
Emailjdamoulakis@isi.edu
Research FocusElectronics, including computing and communications payloads; advanced microelectronics; and reconfigurable electronics such as fault-aware, self-repairing chips that resist radiation and detect errors.
 
Dan Michael Davis, JD
Title Director, Joint Experimentation on Scalable Parallel Processors Project
DegreesJD, School of Law, University of Colorado
BA, Psychology (Quantitative), University of Colorado
Phone310.448.8434
Emailddavis@isi.edu
Research FocusLarge-scale, intelligent agent simulations and high-performance computing (HPC). Data fusion and management, design-rule-checking algorithms, HPC center management, computational science development, and supercomputer uses in the grades K-12 area.
 
Ewa Deelman, PhD
Title  Research Team Leader, Intelligent Systems
Research Assistant Professor, Computer Science, USC
DegreesPhD, Rensselaer Polytechnic Institute
MS, Computer Science, State University of New York at New Paltz
Phone310.448.8408
Emaildeelman@isi.edu
Research FocusDesign and exploration of collaborative scientific environments with particular emphasis on workflow management. Leads the Pegasus project, which designs and implements workflow mapping techniques for large-scale workflows running in distributed environments. Associate Editor of the Scientific Programming Journal and a chair of the GGF Workflow Management Research Group.
 
Jeffery Draper, PhD
Title Project Leader Research Faculty, Ming Hsieh Department of Electrical Engineering, USC
DegreesPhD & MSE, University of Texas at Austin
BS Texas A& M University
Phone310.448.8750
Emaildraper@isi.edu
Research FocusProcessing-in-memory (PIM), radiation-hardening-by-design, computer micro architectures, VLSI, parallel computer architectures, and interconnection networks. Participated in architecture development and led several large-scale VLSI development efforts on a number of projects. VLSI artifacts developed by his research group include two variants of a 55-million transistor PIM chip design and a 100-million gate polymorphous computing chip that was developed in collaboration with Raytheon Company.

 

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