Vivek V Menon

System-Level Framework for Logic Obfuscation with Quantified Metrics for Evaluation

TitleSystem-Level Framework for Logic Obfuscation with Quantified Metrics for Evaluation
Publication TypeConference Paper
Year of Publication2019
AuthorsV. V. Menon, G. Kolhe, A. Schmidt, J. Monson, M. C. French, Y. Hu, P. A. Beerel, and P. Nuzzo
Conference NameIEEE Cybersecurity Development (SecDev)
Date PublishedSeptember
Conference Locationintellectual property , cryptography , reverse engineering , semiconductors , signal processing , algorithms , dynamic range , standards , manufacturing , integrated circuits , fabrication , databases , linear programming , integer programming , security

Logic obfuscation techniques are used to deter intellectual property piracy, reverse engineering, and counterfeiting threats in the design and manufacturing of integrated circuits. However, obfuscation can be reverse-engineered in a variety of ways, there has been little effort in measuring the effectiveness of different obfuscation techniques using uniform security and overhead metrics, and only limited investigations on the effect of combining multiple methods on the same die. This paper presents MIRAGE, a system-level end-to-end framework for integrated circuit obfuscation. MIRAGE includes a front-end design space exploration tool that selects an appropriate combination of obfuscation techniques for a given circuit, a netlist manipulation application programming interface to apply the obfuscation, and a back-end analysis tool that evaluates the obfuscation strength in terms of attack resiliency time as well as area, power, and timing overhead. The effectiveness of the proposed framework is illustrated on benchmarks from ISCAS and cores from an open-source system-on-chip test platform, thus extending the analysis to practical circuits with more than 100k gates. MIRAGE utilizes 1,242 circuit configurations to evaluate 6 obfuscation methods in terms of the attack resiliency time and the obfuscation overheads such as area, power, and timing.